A Hardware Processing Unit for Point Sets

Heinzle, Simon; Guennebaud, Gaël; Botsch, Mario; Gross, Markus

A Hardware Processing Unit for Point Sets

Files

021-031.pdf (1012.35 KB)

Date

2008

Authors

Heinzle, Simon
Guennebaud, Gaël
Botsch, Mario
Gross, Markus

Publisher

The Eurographics Association

Abstract

We present a hardware architecture and processing unit for point sampled data. Our design is focused on fundamental and computationally expensive operations on point sets including k-nearest neighbors search, moving least squares approximation, and others. Our architecture includes a configurable processing module allowing users to implement custom operators and to run them directly on the chip. A key component of our design is the spatial search unit based on a kd-tree performing both kNN and eN searches. It utilizes stack recursions and features a novel advanced caching mechanism allowing direct reuse of previously computed neighborhoods for spatially coherent queries. In our FPGA prototype, both modules are multi-threaded, exploit full hardware parallelism, and utilize a fixed-function data path and control logic for maximum throughput and minimum chip surface. A detailed analysis demonstrates the performance and versatility of our design.

        @inproceedings{:10.2312/EGGH/EGGH08/021-031
,
booktitle = {Graphics Hardware
},
editor = {David Luebke and John Owens
},
title = {{A Hardware Processing Unit for Point Sets
}},
author = {Heinzle, Simon and 
Guennebaud, Gaël and 
Botsch, Mario and 
Gross, Markus
},
year = {2008
},
publisher = {The Eurographics Association
},
ISSN = {1727-3471
},
ISBN = {978-3-905674-09-5
},
DOI = {/10.2312/EGGH/EGGH08/021-031
}
}