Towards a Taxonomy for Display Processors

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dc.contributor.authorSchneider, Bengt-Olafen_US
dc.contributor.editorRichard Grimsdale and Wolfgang Strasseren_US
dc.date.accessioned2014-02-06T14:08:38Z
dc.date.available2014-02-06T14:08:38Z
dc.date.issued1989en_US
dc.description.abstractImage generation for raster displays proceeds in two main steps: geometry processing and pixel processing. The snbsystem performing the pixel processing is called display processor.In the paper a model for the displa.y processor is developed that takes into account both function and timing properties. The model identifies scan conversion, hidden surface removal, shading and anti-aliasing as tile key functions of the display processor. The timing model is expressed in an inequation being fundamental for all display processor architectures.On the basis of that model a taxonomy is presented which classifies display processors according to four main criteria: function, partitioning, a.rchitecture and performance.The taxonomy is applied to five real display processors: Pixel-planes, SLAM, PROOF, the Ray-Casting Machine and the Structured Frame Store System.Investigation of existing display processor architectures on the basis of the devel oped taxonomy revealed a potential new architecture. This architecture partitions the image generation process ill image space and employs a. tree topology.en_US
dc.description.seriesinformationEurographics Workshop on Graphics Hardwareen_US
dc.identifier.isbnISBN 3-540-53473-3en_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttps://doi.org/10.2312/EGGH/EGGH89/003-036en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectAlgorithmsen_US
dc.subjectDesignen_US
dc.subjectPerformanceen_US
dc.subjectRaster Graphicsen_US
dc.subjectDisplay Processorsen_US
dc.subjectTaxonomyen_US
dc.subjectClassificationen_US
dc.subjectModelen_US
dc.subjectPartitioningen_US
dc.subjectArchitectureen_US
dc.titleTowards a Taxonomy for Display Processorsen_US
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EGGH89: Eurographics Workshop on Graphics Hardware 1989