Hardware Outline Character Rasterization

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dc.contributor.authorMorgan, Marcen_US
dc.contributor.authorHersch, Roger D.en_US
dc.contributor.editorA. Kaufmanen_US
dc.date.accessioned2014-02-06T14:15:18Z
dc.date.available2014-02-06T14:15:18Z
dc.date.issued1991en_US
dc.description.abstractThis paper presents the design and implementation of an application specific integrated circuit (ASIC) for real-time rasterization of characters described by their outline based on vertical scan-conversion and flag fill algorithms. The chip acts as a coprocessor which rasterizes outline fonts given by Bezier splines and straight line segments. It generates high quality fonts at a rate 30 times higher than the equivalent assembly language code on a 16 MHz M68020.en_US
dc.description.seriesinformationEurographics Workshop on Graphics Hardwareen_US
dc.identifier.isbn-en_US
dc.identifier.issn-en_US
dc.identifier.urihttps://doi.org/10.2312/EGGH/EGGH91/103-115en_US
dc.publisherThe Eurographics Associationen_US
dc.titleHardware Outline Character Rasterizationen_US
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EGGH91: Eurographics Workshop on Graphics Hardware 1991