A Reconfigurable Architecture for Load-Balanced Rendering

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Date
2005
Journal Title
Journal ISSN
Volume Title
Publisher
The Eurographics Association
Abstract
Commodity graphics hardware has become increasingly programmable over the last few years but has been limited to fixed resource allocation. These architectures handle some workloads well, others poorly; load-balancing to maximize graphics hardware performance has become a critical issue. In this paper, we explore one solution to this problem using compile-time resource allocation. For our experiments, we implement a graphics pipeline on Raw, a tile-based multicore processor. We express both the full graphics pipeline and the shaders using StreamIt, a high-level language based on the stream programming model. The programmer specifies the number of tiles per pipeline stage, and the StreamIt compiler maps the computation to the Raw architecture. We evaluate our reconfigurable architecture using a mix of common rendering tasks with different workloads and improve throughput by 55-157% over a static allocation. Although our early prototype cannot compete in performance against commercial state-of-the-art graphics processors, we believe that this paper describes an important first step in addressing the load-balancing challenge.
Description

        
@inproceedings{
:10.2312/EGGH/EGGH05/071-080
, booktitle = {
Graphics Hardware
}, editor = {
Michael Meissner and Bengt-Olaf Schneider
}, title = {{
A Reconfigurable Architecture for Load-Balanced Rendering
}}, author = {
Chen, Jiawen
and
Gordon, Michael I.
and
Thies, William
and
Zwicker, Matthias
and
Pulli, Kari
and
Durand, Frédo
}, year = {
2005
}, publisher = {
The Eurographics Association
}, ISSN = {
1727-3471
}, ISBN = {
1-59593-086-8
}, DOI = {
/10.2312/EGGH/EGGH05/071-080
} }
Citation