Analysis of Schedule and Layout Tuning for Sparse Matrices With Compound Entries on GPUs
dc.contributor.author | Mueller‐Roemer, J. S. | en_US |
dc.contributor.author | Stork, A. | en_US |
dc.contributor.author | Fellner, D. | en_US |
dc.contributor.editor | Benes, Bedrich and Hauser, Helwig | en_US |
dc.date.accessioned | 2020-10-06T16:53:59Z | |
dc.date.available | 2020-10-06T16:53:59Z | |
dc.date.issued | 2020 | |
dc.description.abstract | Large sparse matrices with compound entries, i.e. complex and quaternionic matrices as well as matrices with dense blocks, are a core component of many algorithms in geometry processing, physically based animation and other areas of computer graphics. We generalize several matrix layouts and apply joint schedule and layout autotuning to improve the performance of the sparse matrix‐vector product on massively parallel graphics processing units. Compared to schedule tuning without layout tuning, we achieve speedups of up to 5.5 × . In comparison to cuSPARSE, we achieve speedups of up to 4.7 × . | en_US |
dc.description.number | 6 | |
dc.description.sectionheaders | Articles | |
dc.description.seriesinformation | Computer Graphics Forum | |
dc.description.volume | 39 | |
dc.identifier.doi | 10.1111/cgf.13957 | |
dc.identifier.issn | 1467-8659 | |
dc.identifier.pages | 133-143 | |
dc.identifier.uri | https://doi.org/10.1111/cgf.13957 | |
dc.identifier.uri | https://diglib.eg.org:443/handle/10.1111/cgf13957 | |
dc.publisher | © 2020 Eurographics ‐ The European Association for Computer Graphics and John Wiley & Sons Ltd | en_US |
dc.subject | GPGPU | |
dc.subject | parallel computing | |
dc.subject | sparse matrix | |
dc.subject | SpMV | |
dc.title | Analysis of Schedule and Layout Tuning for Sparse Matrices With Compound Entries on GPUs | en_US |