Towards a Software Transactional Memory for Graphics Processors

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dc.contributor.authorCederman, Danielen_US
dc.contributor.authorTsigas, Philippasen_US
dc.contributor.authorChaudhry, Muhammad Tayyaben_US
dc.contributor.editorJames Ahrens and Kurt Debattista and Renato Pajarolaen_US
dc.date.accessioned2014-01-26T16:53:16Z
dc.date.available2014-01-26T16:53:16Z
dc.date.issued2010en_US
dc.description.abstractThe introduction of general purpose computing on many-core graphics processor systems, and the general shift in the industry towards parallelism, has created a demand for ease of parallelization. Software transactional memory (STM) simplifies development of concurrent code by allowing the programmer to mark sections of code to be executed concurrently and atomically in an optimistic manner. In contrast to locks, STMs are easy to compose and do not suffer from deadlocks. We have designed and implemented two STMs for graphics processors, one blocking and one non-blocking. The design issues involved in the designing of these two STMs are described and explained in the paper together with experimental results comparing the performance of the two STMs.en_US
dc.description.seriesinformationEurographics Symposium on Parallel Graphics and Visualizationen_US
dc.identifier.isbn978-3-905674-21-7en_US
dc.identifier.issn1727-348Xen_US
dc.identifier.urihttps://doi.org/10.2312/EGPGV/EGPGV10/121-129en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectCategories and Subject Descriptors (according to ACM CCS): D.1.3 [Software]: Programming Techniques- Concurrent Programmingen_US
dc.titleTowards a Software Transactional Memory for Graphics Processorsen_US
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EGPGV10: Eurographics Symposium on Parallel Graphics and Visualization