A Real-Time FPGA-Based Architecture for a Reinhard-like Tone Mapping Operator

dc.contributor.authorHassan, F.en_US
dc.contributor.authorCarletta, J. E.en_US
dc.contributor.editorMark Segal and Timo Ailaen_US
dc.date.accessioned2013-10-28T10:17:33Z
dc.date.available2013-10-28T10:17:33Z
dc.date.issued2007en_US
dc.description.abstractThis paper presents a field-programmable gate array-based hardware architecture for a Reinhard-like tone mapping operator. Modifications to the original Reinhard operator were done to ensure that the operator is amenable to implementation in hardware. The architecture is described in VHDL and has been synthesized using Altera Quartus tools. It achieves an operating frequency consistent with a video rate of 60 frames per second for a frame of 1024×768 pixels. The quality of the implementation is measured using peak signal-tonoise ratios on testbench images.en_US
dc.description.seriesinformationSIGGRAPH/Eurographics Workshop on Graphics Hardwareen_US
dc.identifier.isbn978-3-905673-47-0en_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttps://doi.org/10.2312/EGGH/EGGH07/065-072en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectCategories and Subject Descriptors (according to ACM CCS): I.4.10 [Computing Methodologies]: Image Processing and Computer Vision Image Representation; I.3.1 [Computing Methodologies]: Computer Graphics Hardware Architecture.en_US
dc.titleA Real-Time FPGA-Based Architecture for a Reinhard-like Tone Mapping Operatoren_US
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