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    Single-Pass Full-Screen Hardware Accelerated Antialiasing

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    067-076.pdf (8.409Mb)
    Date
    2000
    Author
    Lee, Jin-Aeon
    Kim, Lee-Sup
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    Abstract
    This paper describes a modified A-buffer algorithm and its hardware architecture for single-pass full-screen antialiasing. For storage and management of fragments, a dynamic memory management scheme, which can be efficiently implemented by hardware is introduced. In the fragment resolving stage, a subpixel color-blending scheme that resolves subpixels simultaneously is used to correctly blend transparencies and resolve intersections of polygons in a pixel. A rasterization processor architecture, which can process multiple pixels simultaneously, is also presented.
    BibTeX
    @inproceedings {EGGH:EGGH00:067-076,
    booktitle = {SIGGRAPH/Eurographics Workshop on Graphics Hardware},
    editor = {I. Buck and G. Humphreys and P. Hanrahan},
    title = {{Single-Pass Full-Screen Hardware Accelerated Antialiasing}},
    author = {Lee, Jin-Aeon and Kim, Lee-Sup},
    year = {2000},
    publisher = {The Eurographics Association},
    ISSN = {1727-3471},
    ISBN = {1-58113-257-3},
    DOI = {10.2312/EGGH/EGGH00/067-076}
    }
    URI
    http://dx.doi.org/10.2312/EGGH/EGGH00/067-076
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