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dc.contributor.authorSmit, J.en_US
dc.contributor.authorBentum, M.en_US
dc.contributor.authorSamsom, M.en_US
dc.contributor.editorP. F. Lister and R. L. Grimsdaleen_US
dc.date.accessioned2014-02-06T14:24:17Z
dc.date.available2014-02-06T14:24:17Z
dc.date.issued1993en_US
dc.identifier.isbn-en_US
dc.identifier.issn-en_US
dc.identifier.urihttp://dx.doi.org/10.2312/EGGH/EGGH93/056-061en_US
dc.description.abstractThe amount of power dissipated by the implementation of an algorithm, for instance in the form of a dedicatedchip-set, is considered to be one of the most important constraints for the selection of a high performance graphicsalgorithm. This is due to the fact that the realization of computational capability within the reach of one Teraoperations per second is non-practical with general purpose CPU-chips. The case study of a high performancesurface visualization engine is used to introduce the reader with the aspect of power dissipation in relation tocomputational power. We introduce a low-power' parallel datapath' RISe processor, based on a highly efficientmapping of locality of reference in the algorithm onto silicon. A subsequent classification is made for varioushigh performance graphics algorithms.en_US
dc.publisherThe Eurographics Associationen_US
dc.titleThe Role of Power Dissipation and Locality of Reference in the Specification of High Performance Graphics Algorithmsen_US
dc.description.seriesinformationEurographics Workshop on Graphics Hardwareen_US


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