EG1986Lisbon, Portugalhttps://diglib.eg.org:443/handle/10.2312/1942024-03-29T15:32:29Z2024-03-29T15:32:29ZTowards a Formal Specification of the GKS Output PrimitivesDuce, D. A.Fielding, E. V. C.https://diglib.eg.org:443/handle/10.2312/eg198610252022-03-28T11:54:48Z1986-01-01T00:00:00ZTowards a Formal Specification of the GKS Output Primitives
Duce, D. A.; Fielding, E. V. C.
A.A.G. Requicha
1986-01-01T00:00:00ZThe Integrated Display Controller (IDC) for VLSI-Design WorkstationsStrk, Jrgenhttps://diglib.eg.org:443/handle/10.2312/eg198610232022-03-28T11:54:48Z1986-01-01T00:00:00ZThe Integrated Display Controller (IDC) for VLSI-Design Workstations
Strk, Jrgen
A.A.G. Requicha
A display controller to accelerate the updating of the frame buffer in raster displays is presented. The advantage of a frame buffer system is the ability to display pictures of any complexity, flicker free. The disadvantage is the great amount of pixel data, which must be updated, when the picture is changed. The Integrated Display Controller (IDC) described in this paper gets its name from the fact, that both a pixel plane and a processor are integrated on a single chip. An internal logical unit, a shifter and special memory are provided to process complete rows and columns of pixels, or some part of them in parallel All operations are performed in one bus cycle, which means that all the pixels addressed in the row or column are modified at the same time. Due to the special organization of the IDC, time consuming operations like block transfer or scrolling can be done significantly faster than in conventional systems. An experimental IDC with a lower screen resolution is developed to demonstrate the feasibility of the design. It is intended for use in VLSI-design workstations, where a great quantity of data has to be manipulated.
1986-01-01T00:00:00ZA Multiprocessor Architecture For High-Quality Interactive DisplaysSutherland, Robert J.https://diglib.eg.org:443/handle/10.2312/eg198610222022-03-28T11:54:47Z1986-01-01T00:00:00ZA Multiprocessor Architecture For High-Quality Interactive Displays
Sutherland, Robert J.
A.A.G. Requicha
A multiprocessor array coupled to a deep framebuffer is proposed as the basis for an interactive user environment of high quality. Several aspects of such an architecture are considered, improvements on previous approaches are suggested, and two designs of high-performance displays based on standard LSI components are described.
1986-01-01T00:00:00ZAn Introduction to the Graphics Systems ProcessorShort, Grahamhttps://diglib.eg.org:443/handle/10.2312/eg198610242022-03-28T11:54:47Z1986-01-01T00:00:00ZAn Introduction to the Graphics Systems Processor
Short, Graham
A.A.G. Requicha
This paper describes the system applications of the Graphics System Processor (GSP) produced by Texas Instruments Inc. The paper discusses the general-purpose capabilities of the GSP which make it a flexible processor to use. It then goes on to show how the graphics-specific parts of the GSP make it a powerful tool, ideally suited to graphics applications. Finally the paper discusses some of the programmable hardware functions of the GSP which make it easy to design into any graphics system.
1986-01-01T00:00:00Z