Jansen, Frederik W.A.A.G. Requicha2015-09-292015-09-2919861017-4656https://doi.org/10.2312/eg.19861003VLSI techniques have greatly enlarged the possibilities to design new frame buffer architectures with parallel processing capabilities down to the pixel level. For these pixel processor systems a parallel hidden surface algorithm is presented for displaying objects defined with Constructive Solid Geometry. The algorithm is based on a CSG evaluation with bitwise operations and multiple scanning of the primitives.10.2312/eg.19861003