Wei, BinClark, Douglas W.Felten, Edward W.Li, KaiS. N. Spencer2014-02-062014-02-0619980-89791-097-X1727-3471https://doi.org/10.2312/EGGH/EGGH98/087-096A multiple-port, distributed frame buffer has been recently proposed to support parallel rendering on multicomputers. This paper describes an implementation of such a distributed frame buffer for the Intel Paragon routing network, and reports its performance results. We have conducted several experiments with the system we have developed. Our results indicate that placing a multipleport, distributed frame buffer directly on the host internal routing network can provide high throughput to eliminate the bottleneck of merging a final image from multiple processors to a frame buffer. This architectural approach can also effectively support image composition for sort-last. The synchronization algorithm we have developed requires only one-way communication and minimizes receive overhead for message passing to the frame buffer.B.4.3 [Input/Output]SubsystemsParallel I/O1.3.1 [Computer Graphics]Hardware ArchitectureParallel ProcessingC.4 [Performance of Systems]Design Studies.