Morgan, MarcHersch, Roger D.A. Kaufman2014-02-062014-02-061991--https://doi.org/10.2312/EGGH/EGGH91/103-115This paper presents the design and implementation of an application specific integrated circuit (ASIC) for real-time rasterization of characters described by their outline based on vertical scan-conversion and flag fill algorithms. The chip acts as a coprocessor which rasterizes outline fonts given by Bezier splines and straight line segments. It generates high quality fonts at a rate 30 times higher than the equivalent assembly language code on a 16 MHz M68020.Hardware Outline Character Rasterization