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1987 - 19882
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Subject: shading × Has files: true × Start date: 1987 × End date: 1989 ×

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    PROOF: An Architecture for Rendering In Object Space
    (The Eurographics Association, 1988) Schneider, Bengt-Olaf; Claussen, Ute; A. A. M.Kuijk
    This paper gives a short introduction into the field of computer image generation in hardware. It discusses the two main approaches, namely partitioning in Image space and In object space. Based on the object space partitioning approach we have defined the PROOF architecture. PROOF is a system that aims at high performance and high quality rendering of raster images. high performance means that up to 30 pictures are generated in one second. The pictures are shaded and anti-allased, giving the images a high degree of realism. The architecture comprises tnree stages which are responsible for hidden surface removal, shading, and filtering respectively. The first of these stages a pipeline of object processors. Each of these processors stores and scan converts one obiect Furthermore, It interpolates the depth and the normal vector across the Object. Each object processor IS able to handle objects of a certain primitive type. The specialization of an object processor to a certain primitive type is encapsulated in a Single block called primitive processor. The Outout of the object processor pipeline is the input to a stage for shading. The illumination model employed takes In~o account both diffuse and specular reflections. The paper reviews Gouraud and Phong shading with regard to their suitability for a hardware implementation. The final stage of the PROOF system is formed by a stage for filtering the colours of those objects that contribute to a pixel. This done by constructing a subpixel mask and filtering across an area of 2x2 pixels. At the end. the paper briefly reports on the current state of the project.
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    VLSI Drawing Processor Utilizing Multiple ParallelScan-Line Processors
    (The Eurographics Association, 1987) Denault, Damian; Ryherd, Eric; Torborg, John; Fons Kuijk and Wolfgang Strasser
    In a typical graphics system, a single drawing processor is used to perform pixel level drawing operations, one pixel at a time. A VLSI based drawing processor and image memory controller is presented which takes advantage of scan-line partitioning of many graphics operations. A four processor implementation is described which operates on four scan-lines in parallel to achieve near real-time shading performance for complex objects. Drawing processor commands are provided for points, vectors, triangles, rectangles, block pixel moves, and image transfers. Vectors and triangles can be drawn with shading and depth buffering. The chips also incorporate integral vector and area pattern registers, and support translucency. The drawing processor chips directly interface to the image memory RAMs without any external buffers, registers, caches, or control logic, allowing a high performance system to be configured simply and cost effectively. These chips are implemented in the GX4000 high performance workstation graphics system which is capable of rendering close to 200,000 shaded and depth-buffered 100 pixel polygons per second and over 34,000 shaded and depth-buffered 1000 pixel polygons per second.