Eurographics Workshop on Graphics Hardware 1996

Bennebroek, K.; Ernst, I.; Rüsseler, H.; Wittig, O.
Design Principles of Hardware-based Phong Shading and Bump Mapping

Waller, Marcus; Dunnett, Graham; Bassett, Mike; MCCann, Shaun; Makris, Alex; White, Martin; Lister, Paul
TAYRA - A 3D Graphics Raster Processor

Makris, "Alex; White, Martin; Lister", Paul
An Advanced 3D Frame Buffer Memory Controller

Jordan, Stephen D.; Jensen, Philip E.; Lichtenbelt, Barthold B. A.
An Architecture for High-Performance 2-D Image Display

Kugler, Anders
The Setup for Triangle Rasterization

McManus, Donald; Beckmann, Carl
Optimal Static 2-Dimensional Screen Subdivision for Parallel Rasterization Architectures

Banks, David C.
The ImageSwitcher: A Proposed System Architecture Designed to Reduce VR Lag

Leray, P.
New advances in Neuro -Visual Simulation and Symbolic extraction for Real World Computing, 3D Image Analysis and 3D object Digitization

Smit, J.; Bosma, M.
On the energy complexity of Algorithms realized in CMOS, a Graphics Example

Smit, Jaap; Bosma, Marco
Graphics Algorithms on Field Programmable Function Arrays

Boer, M. de; Gropl, A.; Hesser, J.; Männer, R.
Latency- and Hazard-Free Volume Memory Ar­ chitecture for Direct Volume Rendering

Boer, M. de; Hesser, J.; Gropl, A.; Gunther, T.; Poliwoda, C.; Reinhart, C.; Manner, R.
Evaluation of a Real-Time Direct Volume Rendering System

Kanus, Urs; Meißner, Michael; Straßer, Wolfgang; Pfister, Hanspeter; Kaufman, Arie; Amerson, Rick; Carter, Richard J.; Culbertson, Bruce; Kuekes, Phil; Snider, Greg
Cube-4 Implementations on the Teramac Custom Computing Machine