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    Eurographics Workshop on Graphics Hardware 1987




    Ovennars, Mark H.
    New Algorithms for Computer Graphics


    Kuijk, A.A.M.; Hagen, P.J. W. ten; Akman, V.
    An Exact Incremental Hidden Surface RemovalAlgorithm


    Skyttä, Jorma; Takala, Tapio
    Partially Ordered Search Indices in the Organizationof a Fixed Hierarchy


    Schneider, Bengt-Olaf
    Ray Tracing Rational B-Spline Patches in VLSI


    Dévai, F.
    An O(log N) Parallel Time Exact Hidden-LineAlgorithm


    Finch, H.R; Agate, M.; Garel, A.A.; Lister, P.F.; Grimsdale, RL
    A Multiple Application Graphics Integrated CircuitMAGIC II


    Kaufman, Arie
    A Two-Dimensional Frame Buffer Processor


    Möller, Reinhard
    Comparison of Two Floatin~Point Arithmetic Unitsfor a Precomputer in a Graphics System forReal Time Simulation


    Winser, Paul
    3D Graphics For Consumer Applications -How Realistic Does it Have to Be?


    Akman, Varol; Hagen, Paul ten; Kuijk, Fons
    A Vector-like Architecture for Raster Graphics


    Claussen, Ute
    Parallel Subpixel Scanconversion


    Denault, Damian; Ryherd, Eric; Torborg, John
    VLSI Drawing Processor Utilizing Multiple ParallelScan-Line Processors


    Eyles, John; Austint, John; Fuchs, Henry; Greer, Trey; Poulton, John
    Pixel-Planes 4: A Summary


    Jackèl, D.
    Reconstructing Solids from Tomographic Scans --The PARCUM II System-·


    Jansen, Frederik W.
    A Multi-Processor Workstationwith a Logic-Enhanced Distributed Frame Buffer


    Meriaux, Michel
    Cellular Architectures and Algorithmsfor Image Synthesis

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    Eurographics Association copyright © 2013 - 2023 
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    Theme by @mire NV
    System hosted at  Graz University of Technology.
    TUGFhA