Browsing by Subject "1.3.7 [Computer Graphics]"
Now showing items 1-12 of 12
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Antialiased Parameterized Solid Texturing Simplified for Consumer- Level Hardware Implementation
(The Eurographics Association, 1999)Procedural solid texturing was introduced fourteen years ago, but has yet to find its way into consumer level graphics hardware for teal-time operation. To this end, a new model is introduced that yields a parameterized ... -
Design of a Fast Voxel Processor for Parallel Volume Visualization
(The Eurographics Association, 1995)The basics of a parallel real-time volume visualization architecture are introduced. Volume data is divided into subcubes that are dis tributed among multiple image processors and stored in their pri vate voxel memories. ... -
EM-Cube: An Architecture for Low-Cost Real-Time Volume Rendering
(The Eurographics Association, 1997)EM-Cube is a VLSI architecture for low-cost, high quality volume rendering at full video frame rates. Derived from the Cube4 architecture developed at SUNY at Stony Brook, EM-Cube computes sample points and gradients ... -
High-Quality Volume Rendering Using Texture Mapping Hardware
(The Eurographics Association, 1998)We present a method Jor volume rendering of regular grids which takes advantage of 3D texture mapping hardware currently, available on graphics workstations. Our method products accurate shading for arbitrary and dynamically ... -
Hybrid Volume and Polygon Rendering with Cube Hardware
(The Eurographics Association, 1999)We present two methods which connect today s polygon graphics hardware accelerators to Cube-5 volume rendering hardware, the successor to Cube4 The proposed methods allow mixing of both opaque and translucent polygons with ... -
Memory Access Patterns of Occlusion-Compatible 3D Image Warping
(The Eurographics Association, 1997)McMillan and Bishop s 3D image warp can be efficiently implemented by exploiting the coherency of its memory accesses. We analyze this coherency, and present algorithms that take advantage of it. These algorithms traverse ... -
Neon: A Single-Chip 3D Workstation Graphics Accelerator
(The Eurographics Association, 1998)High-performance 3D graphics accelerators traditionally require multiple chips on multiple boards, including geometry, rasterizing, pixel processing, and texture mapping chips. These designs are often scalable: they can ... -
Optimal Depth Buffer for Low-Cost Graphics Hardware
(The Eurographics Association, 1999)3D applications using hardware depth buffers for visibility testing are confronted with multiple choices of buffer types, sizes and formats. Some of the options are not exposed through 3D API or may be used by the driver ... -
Parallel Texture Caching
(The Eurographics Association, 1999)The creation of high-quality images requires new functionality and higher performance in real-time graphics architectures. In terms of functionality, texture mapping has become an integral component of graphics systems, ... -
PixelFlow: The Realization
(The Eurographics Association, 1997)PixelFlow is an architecture for high-speed, highly realistic image generation, based on the techniques of object-parallelism and image composition. Its initial architecture was described in [MOLN92]. After development by ... -
Texture Shaders
(The Eurographics Association, 1999)Extensions to the texture-mapping support of the abstract graphics hardware pipeline and the OpenGL API are proposed to better support programmable shading, with a unified interface, on a variety of future graphics accelerator ... -
Triangle Scan Conversion using 2D Homogeneous Coordinates
(The Eurographics Association, 1997)We present a new triangle scan conversion algorithm that works entirely in homogeneous coordinates. By using homogeneous coordinates, the algorithm avoids costly clipping tests which make pipelining or hardware implementations ...