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Building a Full Scale VLSI-Based Volume Visualization System
(The Eurographics Association, 1990)
The hardware realization of an advanced prototype of the Cube volume visualization system, Cube-3, is presented. The primary hardware component of Cube is a viewing and rendering multiprocessor with distributed 3D voxel ...
Hidden contours on a frame-buffer
(The Eurographics Association, 1992)
To comply with drafting practices and because shaded images do not always reveal the internal or hiddenstructures of 3D models, designers need wireframe images with hidden lines dashed and nonconlour tesselation edges ...
The Flipping Cube: A Device for Rotating 3D Rasters
(The Eurographics Association, 1991)
Driven by the prospect of three-dimensional rasters as a primary vehicle for future 3D graphics and volumetric imaging, this paper introduces an architecture for real-time rendering of high-resolution volumetric images. ...
The I.M.O.G.E.N .E. Machine: Some Hardware Elements
(The Eurographics Association, 1991)
The goal of the I.M.O.G.E.N.E. project is to define a real time graphics system. We focus on true real time display, images being computed at frame rate, i.e 50 (or 60) times a second. The I.M.O.G.E.N.E. machine uses no ...
XInPosse: Structural Simulation for Graphics Hardware
(The Eurographics Association, 1991)
A structural simulator is used both to test hardware and to visualizesoftware that should run on that hardware. In a layered set of graphical hardwaresimulators, a structural simulator bridges the gap between hardware ...
Dynamic Load Balancing within a High PerformanceGraphics System
(The Eurographics Association, 1991)
Interactive 3D graphics applications require significant arithmetic processing to meet the ever-inreasing desire for higher image complexity and higher resolution in displayed images. This paper describes a graphics processor ...
An Architecture for a High Performance Rendering Engine
(The Eurographics Association, 1991)
We present an architecture for a high-performance programmable rendering engine.This chip or chip-set will be able to deliver one Gouraud-shaded, z-buffered, texturemodulated and alpha-blended pixel every clock cycle. Focus ...
Space Partitioning for Mapping RadiosityComputations onto a Pipelined Parallel Architecture (II)
(The Eurographics Association, 1991)
A new space partitioning technique is elaborated. In part I of the paper [3], we proposed a shell-like structure which is to be superimposed on a uniform grid data structure and is adaptive to the local environment seen ...
Hardware Outline Character Rasterization
(The Eurographics Association, 1991)
This paper presents the design and implementation of an application specific integrated circuit (ASIC) for real-time rasterization of characters described by their outline based on vertical scan-conversion and flag fill ...
Silicon Compilers for Graphics Hardware Design
(The Eurographics Association, 1991)
Experiences with the realization of an object processor using a silicon compiler will be described. Object processors are parts of the object oriented display processor architecture PROOF (Pipeline for Rendering in an ...